1. Field of the Invention
The present invention relates to an insulated gate semiconductor device, and more particularly to an insulated gate semiconductor device adapted to exhibit reduced variation in saturation current and increased resistance to electrical breakdown in a short-circuit capacity test.
2. Background Art
IGBTs (Insulated Gate Bipolar Transistors), which are a type of insulated gate semiconductor device, are widely used in power converters such as inverters, since they combine the high speed operation of MOSFETs and the low turn-on voltage characteristics of bipolar transistors.
In recent years, the turn-on voltage and the switching loss of transistors have been reduced due to development of IGBTs having a trench gate structure. Furthermore, with the appearance of improved IGBTs and IEGTs (Injection Enhanced Gate transistors) having a carrier storage layer, the longitudinal carrier distribution within the chip can be optimized resulting in further reduction of the turn-on voltage and switching loss (see, e.g., Japanese Laid-Open Patent Publication No. 2001-15738).
The above structure allows IGBTs to operate with reduced heat generation and hence improved current density. This results in a reduced chip size, leading to various benefits such as a reduction in the chip cost and in the size of IGBT modules employing such IGBTs (see, e.g., Japanese Laid-Open Patent Publication No. 2001-15738).
Before the IGBTs with a trench gate structure were developed, the minimum chip size was primarily limited by the amount of heat generated by the IGBTs when they were operated. Recently, however, IGBTs have been adapted to operate with less heat generation, and furthermore there have been advances in the technology of cooling a package including IGBTs. Therefore, the chip size has been limited by variation in the threshold voltage Vth or in the saturation current, rather than by the generated heat.
There will be described the reason why the chip size is limited by variation in the threshold voltage Vth and in the saturation current. If an IGBT is short-circuited and, as a result, a large current flows through it, the control circuit usually detects the short-circuit current and reduces the gate voltage to cut off the current. However, it takes a few microseconds for the control system to cut off the short-circuit current after detecting it, meaning that the chip must be designed so as not to be damaged by the current during this time period.
If the saturation current of an IGBT is too high, the IGBT generates a large amount of heat (equal to the time integral of the product of the saturation current and the collector-emitter voltage of the IGBT) when it is short-circuited, which might result in breakdown of the chip in a short time. Therefore, the IGBT must be designed so as not to generate a higher saturation current than necessary.
If, on the other hand, the saturation current is too small, the control circuit cannot detect when the IGBT is short-circuited and hence does not cut off the short-circuit current. As a result, the short-circuit current continues to flow for a long time, resulting in damage to the chip due to the generated heat. Accordingly, the saturation current value must be within a certain range.
When IGBTs vary in saturation current widely, the MOS portion of an IGBT chip must be designed such that the chip is not damaged even if it includes IGBTs having a high saturation current. Specifically, the chip area must be increased to reduce the saturation current per unit area.
The gate threshold voltage VGE (or Vth) is a major factor in determining the value of the saturation current. The lower the gate threshold voltage VGE (or Vth), the higher the saturation current. The saturation current decreases with increasing gate threshold voltage VGE. This means that variations in the saturation current can be reduced by reducing variations in the gate threshold voltage VGE (or Vth).
In the case of an IGBT having a trench gate structure, however, the saturation current varies due to variations in the dimensions of the trench openings or due to lithographic mask misalignment between the trench and emitter forming processes even if the gate threshold voltage VGE (or Vth) is maintained at a constant level. That is, IGBTs having a trench gate structure exhibit larger variations in saturation current than planer IGBTs even if the variation of their gate threshold voltage VGE (or Vth) is reduced to a small level. Especially, IGBTs with a trench gate structure including a carrier storage layer have a significant tendency to have such characteristics.
A description will now be made of factors causing variations in the saturation current of IGBTs having a trench structure. FIG. 83 is a plan view of an IGBT having a trench structure as viewed from the principal surface side of the substrate. FIGS. 84 and 85 are cross-sectional views taken along lines I-I and II-II, respectively, of FIG. 83.
Referring to FIG. 83, trenches 4 are arranged in stripes on the principal surface of the substrate. Emitter diffusion layers 9 are also arranged in stripes so as to extend in a direction intersecting the trenches 4. Further, emitter diffusion layers 9a are provided on both sides of each trench 4 such that they parallel the trenches 4 arranged in stripes. Thus, the emitter diffusion layers 9 and 9a together form a lattice-shaped emitter diffusion layer.
As shown in FIGS. 84 and 85, interlayer films 7 are formed so as to cover the top surfaces of the trenches 4. Contact regions 8 are provided between adjacent interlayer films 7. An emitter electrode 6 is formed on the entire top surfaces of a base region 3 and the interlayer films 7. In the cross section shown in FIG. 84, the emitter electrode 6 is electrically connected to the base region 3 through the contact regions 8. In the cross section shown in FIG. 85, on the other hand, the emitter electrode 6 is electrically connected to the emitter diffusion layers 9 through the contact regions 8.
Referring to FIG. 85, when the IGBT is turned on, electrons are supplied from the emitter electrode 6 to the emitter diffusion layers 9 through the contact regions 8. These electrons proceed from the emitter diffusion layers 9 to the emitter diffusion layers 9a connected to the emitter diffusion layers 9 and then to the collector electrode 10 side through the channel regions (not shown) formed along the trenches 5 within the base region 3.
It should be noted that a voltage drop occurs across the emitter diffusion layers 9a. That is, the voltage varies with position along each emitter diffusion layer 9a; it decreases with increasing distance from the connection point between the emitter diffusion layer 9a and the emitter diffusion layer 9 connected thereto. This voltage drop is equal to the product of the emitter diffusion resistance (or emitter ballast resistance) and the electron current. Therefore, the voltage actually applied to the gate is reduced by these emitter diffusion layers 9a, resulting in a reduced saturation current.
In the above configuration, the emitter ballast resistance can be varied by varying the distances between the emitter diffusion layers 9, which are formed in a direction intersecting the trenches 4 arranged in stripes. This means that it is easy to design (or adjust) the saturation current level. Furthermore, the ballast resistance prevents the saturation current from increasing to an unacceptably high level, since the higher the current, the higher the voltage drop across the resistance.
However, in a manufacturing process of the above IGBT, a reduction in the width of the trenches (or trench openings) 4 results in an increase in the width of the emitter diffusion layers 9a formed parallel to the trenches 4. This reduces the emitter ballast resistance and hence increases the saturation current. On the other hand, an increase in the width of the trenches 4 leads to a reduction in the saturation current. That is, the above IGBT is disadvantageous in that a variation in the width of the trenches 4 results in a variation in the width of the emitter diffusion layers 9a formed parallel to the trenches 4 and hence a variation in the saturation current level.
To reduce such a variation in the saturation current, an IGBT having a trench gate structure is proposed which does not include the emitter diffusion layers 9a formed parallel to the trenches 4, as shown in FIGS. 86 to 88. Specifically, FIG. 86 is a plan view of the IGBT having the trench structure as viewed from the principal surface side of the substrate. FIGS. 87 and 88 are cross-sectional views taken along lines I-I and II-II, respectively, of FIG. 86.
In this configuration, the emitter ballast resistance does not vary with variations in the width of the trenches (or trench openings) 4, and therefore the saturation current varies only very slightly. The emitter ballast resistance is substantially negligible. However, a problem with this trench gate structure is that it does not include emitter ballast resistance to prevent the saturation current from increasing to an unacceptably high level. As a result, the IGBT has increased transfer characteristics, which makes it difficult to design its saturation current level.